Multiply-accumulate operation

The multiply-accumulate operation, usually shortened to MAC or MAD, is a basic step in digital signal processing and general computing that multiplies two numbers and adds the product to an accumulator, so that the accumulator becomes itself plus the product. The hardware that does this is called a multiplier-accumulator or MAC unit. When the operation is carried out on floating-point numbers it can round twice, as many digital signal processors do, or round once, in which case it is called a fused multiply-add. IEEE 754-2008 specifies the single-rounding form, which gives a more accurate result. Fused multiply-add speeds up dot products, matrix multiplication, polynomial evaluation and convolution, and the article lists the processors that added it, beginning with the IBM POWER1 in 1990.