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Programming Language

AHDL

Simulation Language

AHDL (Altera Hardware Description Language) is a proprietary hardware description language developed by Altera Corporation for describing digital logic to be implemented on Altera's own programmable logic devices and field-programmable gate arrays. AHDL supports both structural design, describing a circuit as interconnected components, and behavioral design using Boolean equations, state machines and truth tables, and was tightly integrated with Altera's MAX+PLUS II and Quartus design software. AHDL has been largely superseded in modern Altera (now Intel) FPGA design flows by the vendor-neutral VHDL and Verilog languages.

Facts
Significance
AHDL is used for digital logic design entry for Altera's complex programmable logic devices and field-programmable gate arrays. 1
Sources
1. Altera Hardware Description Language, Wikipedia
  • Lead section, second sentence
    AHDL is used for digital logic design entry for Altera's complex programmable logic devices (CPLDs) and field-programmable gate arrays (FPGAs).
  • In Group: Hardware Description Languages, Lead
    Altera Hardware Description Language (AHDL) is a proprietary hardware description language (HDL) developed by Altera Corporation.
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